Dept. of Information Systems Science, Grad. School of Engineering, Utsunomiya Univ. / PearLab / Takanobu Baba
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Takanobu Baba

Professor Emeritus, Guest Professor at Center for Optical Research and Education, Utsunomiya University

Biography

Takanobu Baba graduated Kyoto University in 1970 and obtained PhD from Kyoto University in 1978. In 1975 he joined the University of Electro-Communications as a Research Associate and then moved to Utsunomiya University as an Assistant Professor in 1979. From 1982 he spent one year leave at University of Maryland as a Visiting Professor. At Utsunomiya University, he became a Professor in 1990, Director&Vice-President in 2009, and a Professor Emeritus and a Guest Professor at Center for Optical Research and Education in 2013.

His research interests are in computer architecture and parallel processing. At Kyoto University he designed and developed a machine-independent microprogram generating system, called MPG14. At Utsunomiya University, he led research projects of a two-level microprogrammed multiprocessor computer, called MUNAP1,11,13, a parallel object-oriented multicomputer, called A-NET9,10, a profile-guided reconfigurable computer system, named YAWARA4,6,7,8, and a high performance computing for large-scale CGH3. At University of Maryland, he engaged in the research for a data-flow database machine12. In his spare time he authored several books2,5.

He was a hardware area chief of Journal of IPSJ, Chair of IEICE Computer System, and Chair of IEICE Transactions of Information and Systems. He received IPSJ Best Author Award in 1992, and IASTED PDCS Conference Best Paper Awards in 2002, 2008 and 2011. He is IEICE Fellow, IPSJ Fellow, and IEEE Life member.

Selected publications

  1. Takanobu Baba, Kanemitsu Ootsu, "Two-Level Controlled Parallel Reconfigurable Architecture," First Workshop on Pioneering Processor Paradigms (WP3), 4 February, 2017 / Austin, TX, USA(2017). http://wp3workshop.website
  2. Takanobu Baba: Computer Architecture (4-th Edition), Ohm-sha, p.420 (2016) (in Japanese). http://shop.ohmsha.co.jp/shopdetail/000000004777/
  3. Takanobu Baba, Boaz Jessie Jackin, Shinpei Watanabe, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Yoshio Hayasaki, Toyohiko Yatagai, "Object decomposition method for acceleration of large-scale hologram calculations on GPU-clusters," accepted for Poster of IEEE International Conference on Computational Photography (ICCP 2016), May 13-15, Northwestern University, Evanston, IL., USA (2016).
  4. Takanobu Baba, Kazuki Ohshima, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, "Consideration of Loop Parallelization on Heterogeneous Multicore Architecture Using Path and data Dependence Profiling," Proc. 1st Workshop on Software engineering for Parallel Systems (SEPS), Mon 20 - Fri 24 Octover 2014, Portland, Oregon, USA (2014).
  5. Takanobu Baba: 10 Chapters for understanding Computers, Gijyutu-hyouron-sha, p.255, (2005) (in Japanese). http://gihyo.jp/book/2005/4-7741-2422-2
    A simulator and assembler system for the ASC model computer, defined in the book, is available, https://github.com/mjhd-devlion/ASC-Simulator-and-Assembler
  6. Yuan-ming Zhang, Xiao Gang, Takanobu Baba, "Accelerating sequential programs on commodity multi-core processors," Journal of Parallel and Distributed Computing, Elsevier, Vol.74, Issue 4, pp.2257-2265 (2014).
  7. Hiroyoshi Jutori, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba, "Dynamic Selection of Speculative Paths in Two-Path Limited Speculation Method," Proc. 23rd IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS 2011), pp.173-180, Dallas, TX, USA, Dec. 14-16(2011). 【Best Paper Award】
  8. Takanobu Baba, Takashi Yokota, Kanemitsu Ootsu, Fumihito Furukawa, Gaku Ishihara, Moriyuki Saito, "YAWARA: A Meta-Level Optimizing Computer System," Proc. International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems 2004(IWIA 2004), pp.148-153, Jan. 12-13, (2004).
  9. Yoshiyuki Iwamoto, Koichi Suga, Kanemitsu Ootsu, Takashi Yokota, and Takanobu Baba, "Receiving message prediction method," Parallel Computing, Special issue on Parallel and Distributed Scientific and Engineering Computing, Elsevier, Vol.29, No.11-12, pp.1509-1538(2003).
  10. T. Baba, T. Yoshinaga, T.Iijima, Y. Iwamoto, M. Hamada, and M. Suzuki, "A Parallel Object-Oriented Total Architecture: A-NET," Proc. Supercomputing '90, pp.276-285 (1990).
  11. T. Baba: Microprogrammable Parallel Computer- MUNAP and Its Applications - The MIT Press, Computer System Series, p.290 (1987).
  12. Takanobu Baba, S. Bing Yao, and Alan R. Hevner, "Design of a Functionally Distributed, Multiprocessor Database Machine Using Data Flow Analysis," IEEE Trans. on Computers, Vol.C-36, No.6, pp.650-666 (1987).
  13. Takanobu Baba, Ken Ishikawa, and Kenzo Okuda, "A Two-Level Microprogrammed Multiprocessor Computer with Nonnumeric Functions" IEEE Trans. on Computers, Vol.C-31, No.12, pp.1142-1156 (1982).
  14. Takanobu Baba, and Hiroshi Hagiwara, "The MPG System: A Machine-Independent Efficient Microprogram Generator," IEEE Trans. on Computers, Vol.C-30, No.6, pp.373-395 (1981).